Device Status : ACTIVE
 

Features

  • VGA to SDTV/EDTV/HDTV conversion supporting graphics resolutions up to 1600x1200
  • HDTV support for 480p, 576p, 720p, 1080i and 1080p
  • Support for NTSC, PAL, SECAM color modulation.
  • Macrovision™ 7.1.L1 copy protection support for SDTV (CH7021 only)
  • Macrovision™ copy protection support for progressive scan TV (480p, 576p)
  • CGMS-A support for SDTV and HDTV
  • High-speed SDVO* (1G~2Gbps) AC-coupled serial differential RGB inputs
  • Flexible true scale rendering engine supports overscan compensation in all SDTV/EDTV and HDTV output resolutions †
  • Text enhancement filter in scan conversion
  • Adaptive de-flicker filter with up to 7 lines of filtering in scan conversion¥
  • Contrast/Brightness/Sharpness control for TV output.
  • Hue/Saturation Control for TV output.
  • Support for SCART connector
  • Support for HDTV D-Connector
  • Outputs CVBS, S-Video, RGB and YPbPr
  • Support for VGA RGB bypass
  • TV / Monitor connection detect
  • Programmable power management
  • Four 10-bit video DAC outputs
  • Three sets of DAC outputs supporting SDTV / HDTV / CRT RGB connectors
  • Fully programmable through serial port
  • Configuration through Intel® SDVO OpCode*
  • Complete Windows driver support
  • Offered in a 64-pin LQFP and 64-pin QFN package

* Intel ® Proprietary

† Patent number 5,781,241
¥ Patent number 5,914,753

Description

The CH7021/CH7022 is a Display Controller device which accepts a digital graphics high speed AC coupled serial differential RGB input signal, and encodes and transmits data through analog SDTV ports (analog composite, s-video, RGB or YPrPb) or an analog HDTV port (YPrPb). The device is able to encode the video signals and generate synchronization signals for NTSC, PAL and SECAM SDTV standards, as well as analog HDTV interface standards and graphics standards up to UXGA. The device accepts one channel of RGB data over three pairs of serial data ports.

The TV-Out processor will perform scaling to convert VGA frames to supported SDTV and HDTV output standards. Adaptive de-flicker filter provides superior text display. Large numbers of input graphics resolutions are supported up to 1600 by 1200 with full vertical and horizontal overscan compensation in all output standards. A high accuracy low jitter phase locked loop is integrated to create outstanding video quality.

In addition to scaling modes, bypass modes are included which perform color space conversion to SDTV or HDTV standards and generate and insert SDTV or HDTV sync signals, or output VGA style analog RGB for use as a CRT DAC.

Different analog video connectors are supported including composite, s-video, YPrPb, SCART, D-connector and VGA connector.

Content protection support is provided for Macrovision™ in SDTV and EDTV modes. CGMS-A is also provided up to 1080i resolution (CH7021 only).

 

ORDERING INFORMATION
Part Number Package Type RoHS Compliant # of Pins Voltage Supply
CH7021A-TEF Lead Free - LQFP with Exposed Pad Yes 64 2.5V, 3.3V
CH7021A-TEF-TR Lead Free - LQFP with Exposed Pad, Tape and Reel Yes 64 2.5V, 3.3V
CH7021A-BF Lead Free - QFN Yes 64 2.5V, 3.3V
CH7021A-BF-TR Lead Free - QFN, Tape and Reel Yes 64 2.5V, 3.3V
CH7022A-TEF Lead Free - LQFP with Exposed Pad Yes 64 2.5V, 3.3V
CH7022A-TEF-TR Lead Free - LQFP with Exposed Pad, Tape and Reel Yes 64 2.5V, 3.3V
CH7022A-BF Lead Free - QFN Yes 64 2.5V, 3.3V
CH7022A-BF-TR Lead Free - QFN, Tape and Reel Yes 64 2.5V, 3.3V

| Sales Inquiry : Sales@chrontel.com  |  Product Information: Info@chrontel.com |
 

* Terms and Conditions of Sales

Datasheets
View the CH7021/CH7022 Datasheet
Download free Acrobat Reader to view PDF files. Get Adobe Reader
  Application Notes
PCB Layout and Design Considerations for the CH7021/CH7022 SDVO+SDTV/HDTV Encoder, AN-84
  Technical Bulletins
Explanation for the Flickering Display Using Multi-sync TV in PAL Modes, TB-34.pdf (17 KB, 5/8/01)
Explanation of Edge Distorted Display on Low-end TVs, TB-38.pdf (7/12/04)

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