Device Status : ACTIVE
 
Features
  • DVI Transmitter up to 165M pixels/second
  • DVI low jitter PLL
  • DVI hot plug detection
  • Supporting graphics resolutions up to 1600 x 1200 pixels
  • Provides RGB output
  • DAC connection detection
  • Programmable power management
  • Fully programmable through serial port
  • Complete Windows and DOS driver support
  • Low voltage interface support to graphics device
  • Offered in a 64-pin LQFP package

Description

The CH7301C is a display controller device which accepts a digital graphics input signal, and encodes and transmits data through a DVI or DFP (Digital flat panel). The device accepts data over one 12-bit wide variable voltage data port which supports four different RGB data formats.

The DVI processor includes a low jitter PLL for generation of the high frequency serialized clock, and all circuitry required to encode, serialize and transmit data. The CH7301C comes in versions able to drive a DFP display at a pixel rate of up to 165MHz, supporting UXGA resolution displays. No scaling of input data is performed on the data output to the DVI device. See Figure 1 for the functional block diagram of the CH7301C.

Color space conversion from YCrCb to RGB is supported in both DVI and VGA bypass modes.

 

 

< Product End-Of-Life announcement > The CH7009A family which includes CH7009A-T, CH7009A-TF, CH7010A-T, CH7010A-TF, CH7011A-T, CH7011A-TF, CH7012A-T, CH7012A-TF, CH7301A-T and CH7301A-TF products is no longer available or supported by Chrontel effective March 5, 2008.

CH7301A-T and CH7301A-TF are obsolete device. Not recommended for new designs, please send email to Info for more information. The replacement is CH7301C-TF.

* Terms and Conditions of Sales

Datasheets
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  Application Notes

PCB Layout and Design Considerations for CH7301A DVI Output Device, AN-35.pdf (459 KB)
CH7301A Registers Read/Write Operation, AN-41.pdf (4/23/03)
Design Tips To CH7301A DVI Display at 1600 x 1200 Resolution, AN-52.pdf (15 KB, 4/28/02)
A PCB Design Guideline to Prevent DVI Signaling Power-Reverting in CH7301A, AN-57.pdf (11/15/02)
PCB Layout and Design Considerations for CH7301C DVI Output Device, AN-68.pdf (7/23/03)
DACs Connection Detection of CH7301 Encoders, AN-71.pdf (7/30/03)
  Technical Bulletins
DVI Output Eye Diagrams of CH7301A vs. CH7301B, TB-41.pdf (189 KB, 1/20/03)
PCB Design Considerations of DAC outputs with Multiple Video Formats, TB-45.pdf (9/9/03)

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