Features

CH7308A - Single/Dual LVDS Transmitter up to 140Mpixels/s

CH7308B - Single/Dual LVDS Transmitter up to 165Mpixels/s

• Support resolutions up to 1600x1200 (1920x1200 with reduced blanking)
• LVDS low jitter PLL accepts spread spectrum input
• LVDS 18-bit and 24-bit outputs
• 2D dither engine
• Panel protection and power sequencing
• High-speed SDVO1 serial (1G~2Gbps) AC-coupled differential RGB inputs
• Low voltage interface support to graphics device
• Programmable power management
• Fully programmable through serial port
• Configuration through OpCodes1
• Complete Windows driver support
• Boundary scan support
• Offered in a 64-pin LQFP package

* Intel Proprietary
 

Description

The CH7308 is a display controller device, which accepts digital graphics input signals, upscales, encodes, and transmits data through an LVDS transmitter to a LCD panel. This device accepts one channel of RGB data over three pairs of serial data ports.

The LVDS Transmitter includes a low jitter PLL to generate a high frequency serialized clock and all circuitry required to upscale, encode, serialize and transmit data. The CH7308A supports a maximum single channel pixel rate of 140MP/s while the CH7308B supports a maximum pixel rate of 165MP/s. The minimum dual channel pixel rate is 100MP/s.

The LVDS transmitter includes a panel fitting up-scaler and a programmable dither function to support 18-bit LCD panels. Data is encoded into commonly used formats, including those specified in the OpenLDI and SPWG specifications. Serialized data is outputted on three to eight differential channels.

SDVO* LVDS ADD2-Card

SDVO* LVDS ADD2-Card. , incorporates the CH7308 into their design and provides a dual channel LVDS interface for LVDS displays. Please email to sales@chrontel.com for more information.

** CH7308A-TF is discontinuing product.  The replacement part is CH7308B-TF

CH7308B has compatible pin-out and functional features to CH7308A device and therefore, no PCB layout change is required.  In addition, the CH7308B has enhanced ESD protection and increased date rate that can support up to 165Mhz input pixel clock frequency.

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