CH7523

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Features


  • Compliant with DisplayPort (DP) specification version 1.2.

  • Support 2 Main Link Lanes at either 1.62Gb/s or 2.7Gb/s link rate

  • Support CVBS output in format of NTSC or PAL

  • HDCP engine compliant with HDCP 1.3 specification with internal HDCP Keys

  • Embedded MCU to handle the control logic

  • Support device boot up by automatically loading firmware from on-chip flash Boot ROM

  • Integrated EDID Buffer

  • Supports Enhanced Framing Mode

  • 2 work modes: connect 27MHz crystal, inject 27MHz clock

  • TV connection detection supported

  • DP input detection supported

  • Support RGB to YCC conversion in ITU-R BT.601 and 709 color space

  • Support Auto Power Saving mode and low stand-by current

  • Support Spread Spectrum Clocking (de-spreading) for EMI reduction

  • DP AUX channel and IIC slave interface are available for firmware update and debug

  • Low power architecture

  • RoHS compliant and Halogen free package

  • Offered in 40-Pin QFN package (5 x 5 mm)

Describe

Chrontel’s CH7523 is a low-cost, low-power semiconductor device that translates the DisplayPort signal to the CVBS. This innovative DisplayPort receiver with an integrated SDTV encoder is specially designed to target the DisplayPort Docking Station and Automobile Entertainment Device. Through the CH7523’s advanced decoding / encoding algorithm, the input DisplayPort high-speed serialized multimedia data can be seamlessly converted to SDTV video output.

The CH7523 is compliant with the DisplayPort Specification 1.2. With internal HDCP key Integrated, the device support HDCP 1.3 specifications. In the device’s receiver block, which supports two DisplayPort Main Link Lanes input with data rate running at either 1.62Gb/s or 2.7Gb/s, can accept RGB digital formats in either 18- bit 6:6:6 or 24-bit 8:8:8, and converted the input signal to CVBS/S-Video. Leveraging the DisplayPort’s unique source/sink “Link Training” routine, the CH7523 is capable of instantly bring up the video display to the analog TV when the initialization process is completed between CH7523 and the graphic chip.

With sophisticated MCU and the Boot ROM embedded, CH7523 support auto-boot and EDID buffer. After the configuration by firmware, which is auto loaded from Boot ROM, CH7523 can support DP input detection, TV connection detection and determine to enter into Power saving mode automatically.

Structure diagram

Application Desc

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Technical Report

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Specifications

Input Interface eDP/DP

Output Interface CVBS

Audio Interface IIS, SPDIF Output

Other features   No

Package Type QFN40

OrderInfo

Part Number Package Type Operating Temperature Range Minimum Order Quantity

CH7523A-BF 40 QFN, Lead-free Commercial : 0 to 70°C 490/Tray

Video

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About Chrontel Overview Chrontel, headquartered in San Jose, California, is a privately-held company with over 130 employees worldwide. Incorporated in 1986, the company develops and markets mixed-signal integrated circuits for the PC, display and consumer mark...

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